Generally, an image sensor is a semiconductor device that converts an optical image to an electric signal. An image sensor can be classified as a charge coupled device (CCD) or a complementary metal oxide silicon (CMOS) image sensor.
The CCD includes a plurality of photo diodes for converting an optical signal into an electric signal arranged in a matrix pattern, a plurality of vertical charge coupled devices formed between the photo diodes for transferring electric charges generated from the photo diodes in a vertical direction, a horizontal charge coupled device for transferring the electric charges transferred from the vertical charge coupled devices in a horizontal direction, and a sense amplifier for outputting an electric signal by sensing the electric charges transferred in the horizontal direction and outputting an electric signal.
The major drawbacks to the CCD are the complicated driving method and high power consumption. Also, the method for fabricating the CCD can be complicated because a multi-level photo process is required.
In addition, it is difficult to integrate a control circuit, a signal processing circuit, an analog/digital (A/D) converter, and other circuits with the CCD. This makes it difficult to reduce the size of a product employing the CCD.
Therefore, the CMOS image sensor has been developed as a next-generation image sensor that can overcome the drawbacks of the CCD.
The CMOS image sensor is a device employing a switching method in which outputs of the unit pixels are sequentially detected by MOS transistors, the number of which can be identical to that of the number of unit pixels. The MOS transistors are formed on a semiconductor substrate, in which a control circuit and a signal processing circuit are used as peripheral circuits.
That is, a photodiode and a MOS transistor are formed in each unit pixel so that the CMOS image sensor realizes an image by sequentially detecting electric signals of the unit pixels using the switching method.
Since the CMOS image sensor uses CMOS fabrication technology, the power consumption is low and the fabrication process is simplified due to the reduced number of photo processes.
In the CMOS image sensor, since the control circuit, the signal processing circuit, and the A/D converter circuit can be integrated with a CMOS image sensor chip, the size of the product employing the CMOS image sensor can be reduced.
Therefore, the CMOS image sensor has been widely used in a variety of applications such as digital cameras and digital video cameras.
The CMOS image sensor can be classified into types according to the number of transistors, such as a 3T-type, 4T-type, and 5T-type. For example, the 3T-type CMOS image sensor includes one photodiode and three transistors, and the 4T-type CMOS image sensor includes one photodiode and four transistors.
The equivalent circuit and layout of the unit pixel of the 3T-type CMOS image sensor will now be described.
FIG. 1 is an equivalent circuit diagram of the unit pixel of a 3T-type CMOS image sensor and FIG. 2 is a layout of the unit of the 3T-type CMOS image sensor.
Referring to FIG. 1, the 3T-type CMOS image sensor includes a single photodiode PD and three NMOS transistors T1, T2, and T3.
The photodiode PD is connected to a drain of the first NMOS transistor T1 and a gate of the second NMOS transistor T2.
Sources of the first and second NMOS transistors T1 and T2 are connected to a voltage line through which a reference voltage VR is supplied. A gate of the first NMOS transistor T1 is connected to a reset line through which a reset voltage RST is supplied.
A source of the third NMOS transistor T3 is connected to a drain of the second NMOS transistor T2, a drain of the third NMOS transistor T3 is connected to a read circuit (not shown) through a signal line, and a gate of the third NMOS transistor T3 is connected to a column select line through which a select signal SLCT is supplied.
The first NMOS transistor T1 is a reset transistor Rx for resetting photocharges accumulated in the photodiode PD, the second NMOS transistor T2 is a drive transistor Dx acting as a source follower buffer amplifier, and the third NMOS transistor T3 is a select transistor Sx performing an addressing through a switching operation.
Referring to FIG. 2, in the unit pixel of the 3T-type CMOS image sensor, a single photodiode 20 is formed in a wide portion of an active region 10, and gate electrodes 120, 130, and 140 of three transistors are formed to overlap one another in the remaining portion of the active region 10.
That is, the reset transistor Rx is formed by the gate electrode 120, the drive transistor Dx is formed by the gate electrode 130, and the select transistor Sx is formed by the gate electrode 140.
Impurities are doped into the active region 10 of the transistors except for below the gate electrodes 30, 40 and 50, thereby forming a source/drain region of each transistor.
A power voltage Vdd can be applied to the source/drain region between the reset transistor Rx and the drive transistor Dx. In addition, the source/drain region disposed at a side of the select transistor Sx can be connected to a read circuit (not shown).
The gate electrodes 120, 130 and 140 can be connected to respective signal lines (not shown). Each signal line can be provided with a pad connected to an external drive circuit.
The respective signal lines with the pads and the subsequent processes will be described below.
FIGS. 3A to 3E are sectional views illustrating a method for fabricating a related art CMOS image sensor, taken along line III-III′ of FIG. 2.
Referring to FIG. 3A, an epitaxial process is performed on a heavily-doped P++ semiconductor substrate 61 to form a lightly-doped P− epitaxial layer 62.
The lightly-doped P− epitaxial layer 62 is formed to have a thickness of 4-7 μm.
Then, an active region and a device isolation region are defined in the semiconductor substrate 61, and a device isolation layer 63 is formed in the device isolation region using an STI or LOCOS process.
A gate insulating layer 64 and a conductive layer such as a high-concentration polycrystalline silicon layer are sequentially deposited on the entire surface of the epitaxial layer 62. The conductive layer and the gate insulating layer 64 are then selectively removed to form a gate electrode 65.
Referring to FIG. 3B, a first photoresist layer 66 is coated on the entire surface of the resulting structure including the gate electrode 65, and is patterned using an exposure process and a development process to cover the photodiode region and expose the source/drain region of each transistor.
Using the patterned first photoresist layer 66 as a mask, n− impurity ions are implanted into the exposed source/drain region to form an n− diffusion region 67.
Referring to FIG. 3C, the first photoresist layer 66 is removed and a second photoresist layer 68 is coated on the entire surface of the semiconductor substrate 61. The second photoresist layer 68 is patterned to expose blue, green and red photodiode regions using an exposure process and a development process.
Using the patterned second photoresist layer 68 as a mask, n− impurity ions are implanted into the epitaxial layer 62 to form n− diffusion region 69 in the photodiode regions.
The n− diffusion region 69 of each photodiode region is formed more deeply than the n− diffusion region 67 of the source/drain region by implanting impurity ions into the photodiode regions at a higher energy.
The n− diffusion region 69 is deeply formed into the epitaxial layer 62 at high energy so as to increase the sensitivity of the image sensor.
The n− diffusion region 69 corresponds to the source region of the reset transistor (Rx in FIGS. 1 and 2).
In operation, when a reverse bias is applied between the n− diffusion region 69 of the photodiode and the P− epitaxial layer 62, a depletion region is formed. Electrons generated due to light lower the potential of the drive transistor when the reset transistor is turned off. When the reset transistor is turned off and then turned on, the potential is lowered so that a voltage difference occurs. The operation of the image sensor is achieved using the voltage difference in the signal processing.
According to the related art, the n− diffusion region 69 is formed to a depth of 2-4 μm, and the blue, green and red photodiode regions formed by the n− diffusion region 69 are of the same depth.
That is, the impurity ions are implanted into each photodiode region at the same ion implantation energy so that the photodiode region has the same depth.
Referring to FIG. 3D, after the second photoresist layer 68 is completely removed, an insulating layer is deposited on the entire surface of the semiconductor substrate 61 and an etch back process is performed to form gate spacers 70 on both sidewalls of the gate electrode 65.
A third photoresist layer 71 is then coated on the entire surface of the semiconductor substrate 61. The third photoresist layer 71 is patterned by an exposure process and a development process to cover the photodiode region and expose the source/drain region of each transistor.
Using the patterned third photoresist layer 71 as a mask, n+ impurity ions are implanted into the exposed source/drain region to form an n+ diffusion region 72.
Referring to FIG. 3E, the third photoresist layer 71 is removed and a fourth photoresist layer 73 is coated on the entire surface of the semiconductor substrate 61. The fourth photoresist layer 73 is patterned to expose each photodiode region using an exposure process and a development process.
Using the patterned fourth photoresist layer 73 as a mask, p0 impurity ions are implanted into the photodiode region where the n− diffusion region 69 is formed, thereby forming a p0 diffusion region 74 in the surface of the semiconductor substrate.
However, the related art method for fabricating the CMOS image sensor has the following problems.
By forming the blue, green and red photodiodes to the same depth, the difference of penetration depths from the silicon surface to the blue (˜0.5 μm), green (˜2 μm) and red (˜10 μm)can be great due to silicon lattice structure. Consequently, the characteristic of the image sensor is degraded because it cannot effectively operate with respect to the blue and red pixels.